PCB via current capacity is limited by the thin cylinder of plated copper that forms the barrel, which contains far less conducting material than the trace arriving at it. A generously sized trace passing through a single via has a bottleneck in the middle of it. That bottleneck is invisible on the schematic and easy to miss on the layout, and it is a frequent cause of unexplained hot spots.
What a via is made of
A plated through hole starts as a drilled hole through the laminate. The hole walls are made conductive and then electroplated with copper to form a tube connecting the layers. The thickness of that plated wall is a process parameter, commonly on the order of tens of micrometers, with the minimum acceptable value set by the class of workmanship the board is built to and by the fabricator’s own capability. The conducting cross-section is the circumference of the hole multiplied by that wall thickness, which for a typical small via is modest. Compare that against a trace of even moderate width in standard copper and the difference is stark. The via is not a wire; it is a thin-walled tube, and its resistance and current capacity follow accordingly.
Why the bottleneck often goes unnoticed
Trace sizing gets attention because there are charts for it and because the trace is visible across a large area of board. A via occupies almost no area and appears in the layout as a small circle that seems like a connection rather than a conductor. Autorouters place them freely. Power distribution between layers may end up passing through a handful of vias chosen for convenience. The resulting heating is localized, so a thermal image shows small bright points rather than a warm region, and because the via is buried its temperature is not obvious to a probe on the surface. In extreme cases the heat degrades the surrounding laminate or cracks the barrel, producing an intermittent connection that is extremely difficult to diagnose after the fact.
Thermal vias serve a different purpose and follow similar rules
Vias under a power component’s thermal pad exist to move heat rather than current, carrying it from the component’s pad down to an internal or bottom-side copper area that can spread and dissipate it. The same geometry limits apply: a thin copper tube conducts heat well compared to laminate but poorly compared to solid copper, so a useful thermal path needs many vias rather than a few. Their effectiveness depends on what they connect to, since vias reaching a small isolated pad achieve little while vias reaching a large plane achieve a great deal. Manufacturing considerations matter too, because open vias in a pad can wick solder away from the joint, which is why tenting, plugging or filling is often specified.
Sizing an array instead of a single via
The standard practice for meaningful current or heat is an array of vias in parallel. Resistance and thermal resistance both fall roughly in proportion to the number, provided they are genuinely in parallel between the same two copper regions and the copper on each side can distribute the current to all of them. Two vias at the end of a narrow trace are not in parallel in any useful sense if the trace cannot feed them equally. Larger drill diameters carry more current per via because the circumference is larger, so a few larger vias can be more effective than many tiny ones, subject to the board’s design rules and the space available. The fabricator’s data on plating thickness is the starting point for any calculation.
Verifying rather than calculating alone
Because plating thickness varies within a fabricator’s tolerance and between suppliers, a calculation gives you an estimate rather than a guarantee. Measure the assembled board under full load with a thermal camera, looking specifically at via fields and at the transitions where current changes layers, and do it with the board in its enclosure at the maximum ambient. Measure voltage drop across layer transitions on a powered board if the rail tolerance is tight. Where reliability matters, consider that thermal cycling stresses via barrels mechanically, so a via running hot is also being fatigued. Specifying a minimum plating thickness in the fabrication notes is reasonable when the design depends on it.
What to check before you act
- Count the vias in every high-current path and treat one as a bottleneck.
- Ask the fabricator for their minimum barrel plating thickness.
- Make sure the copper on both sides can feed every via in an array.
- Thermal image the assembled board under full load, looking at via fields.
Common questions
How many vias should a power connection use?
Enough that no single via carries a significant share of the total, which usually means an array rather than a pair. Base the number on the fabricator’s plating data and confirm it thermally.
Do filled vias carry more current?
Filling with conductive material can improve conduction, while filling with non-conductive epoxy mainly aids manufacturability. Ask the fabricator what their fill process does electrically before assuming a benefit.
The practical takeaway
Treat a via as the narrowest conductor in its path and design accordingly. Use arrays for current and for heat, make sure the copper on both sides can share the load, get the plating thickness from the fabricator rather than guessing, and confirm the result with a thermal image of a fully loaded board.
References and further reading
- NFPA: electrical safety research and guidance on overheating equipment and fire risk
- Department of Energy: how electronics losses turn into wasted energy and heat
- CPSC: safety guidance for electronics and electrical products indoors
Numerical scenarios are illustrative unless identified otherwise. Follow the exact product instructions; component ratings and local installation requirements can differ.
